標題: A digital BIST methodology for spread spectrum clock generators0
作者: Chou, Maohsuan
Hsu, Jenchien
Su, Chauchin
電控工程研究所
Institute of Electrical and Control Engineering
公開日期: 2006
摘要: In this paper, a built-in-self-test methodology for spread-spectrum clock generators is presented. It utilizes a multi-phase phase detector to detect the linearity of the frequency variation and the short-term jitter. The methodology is analyzed and simulated. As an all digital design, the hardware overhead is very small.
URI: http://hdl.handle.net/11536/135239
ISBN: 978-0-7695-2628-7
ISSN: 1081-7735
期刊: PROCEEDINGS OF THE 15TH ASIAN TEST SYMPOSIUM
起始頁: 251
結束頁: +
顯示於類別:會議論文