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dc.contributor.authorXie, Li-Yanen_US
dc.contributor.authorLiu, Jia-Qien_US
dc.contributor.authorWang, Yu-Boen_US
dc.contributor.authorChuang, Chenghsinen_US
dc.contributor.authorChin, Alberten_US
dc.contributor.authorLi, Joshua Le-Weien_US
dc.contributor.authorKang, Kaien_US
dc.date.accessioned2017-04-21T06:50:16Z-
dc.date.available2017-04-21T06:50:16Z-
dc.date.issued2014en_US
dc.identifier.isbn978-1-934142-28-8en_US
dc.identifier.issn1559-9450en_US
dc.identifier.urihttp://hdl.handle.net/11536/135350-
dc.description.abstractThis paper presents a miniature and high gain on-chip V band microstrip antenna. A ground plane on the bottom metal layer M-1 has been approached to shield the wave from penetrating into the low-resistivity and high dielectric constant Si substrates to improve the antenna performance. Antenna parameters have been investigated to obtain an optimized antenna with 0.87 mm * 1.16 mm occupation. The measured and simulated return loss results and simulated radiation pattern results of proposed antenna have been presented. The performance of the proposed antenna as compared to other published on-chip antennas has also been demonstrated.en_US
dc.language.isoen_USen_US
dc.titleInvestigation of a Miniature and High Gain On-chip V Band Microstrip Antennaen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPIERS 2014 GUANGZHOU: PROGRESS IN ELECTROMAGNETICS RESEARCH SYMPOSIUMen_US
dc.citation.spage383en_US
dc.citation.epage385en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000393225900080en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper