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dc.contributor.authorJui, Ping-Changen_US
dc.contributor.authorWey, Chin-Longen_US
dc.contributor.authorShiue, Muh-Tianen_US
dc.date.accessioned2017-04-21T06:50:04Z-
dc.date.available2017-04-21T06:50:04Z-
dc.date.issued2013en_US
dc.identifier.isbn978-1-4799-0066-4en_US
dc.identifier.issn1548-3746en_US
dc.identifier.urihttp://hdl.handle.net/11536/135384-
dc.description.abstractThis paper presents a conflict-free ROM addressing scheme for generating the TF tables. Basically, the conventional (N/2)-words ROM table for the Radix-2 Memory-Based FFT (MBFFT) processor with single process element (PE) is equally partitioned into 2(p) sub-tables allowing all 2(p) PEs to simultaneously access the twiddle factors without causing any conflict. This study presents the use of MBFFT processor with 4 parallel PEs. Result show that the proposed scheme can reduce the chip area of DVB-T2 applications by 18.85%. The hardware reduction is of significance.en_US
dc.language.isoen_USen_US
dc.subjectFast Fourier transform (FFT)en_US
dc.subjectorthogonalen_US
dc.subjectButterfly Processing Element (PE)en_US
dc.subjectTwiddle Factorsen_US
dc.subjectROMen_US
dc.subjectConflict-free ROM Addressing Schemeen_US
dc.titleLow-Cost Parallel FFT Processors with Conflict-Free ROM-Based Twiddle Factor Generator for DVB-T2 Applications1en_US
dc.typeProceedings Paperen_US
dc.identifier.journal2013 IEEE 56TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)en_US
dc.citation.spage1003en_US
dc.citation.epage1006en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000333176800252en_US
dc.citation.woscount0en_US
Appears in Collections:Conferences Paper