標題: Experimentally Effective Clean Process to C-V Characteristic Variation Reduction of HKMG MOS Devices
作者: Chen, Chien-Hung
Li, Yiming
Chen, Chieh-Yang
Chen, Yu-Yu
Hsu, Sheng-Chia
Huang, Wen-Tsung
Chu, Sheng-Yuan
電機工程學系
Department of Electrical and Computer Engineering
公開日期: 2013
摘要: In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples\' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (Delta V-fb) and density of interface traps (D-it) have around 50% improvement.
URI: http://hdl.handle.net/11536/135414
ISBN: 978-1-4799-0675-8
978-1-4799-0676-5
期刊: 2013 13TH IEEE CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO)
起始頁: 1168
結束頁: 1171
Appears in Collections:Conferences Paper