標題: Influence of Postdeposition Annealing on Physical and Electrical Properties of High-k Yb2TiO5 Gate Dielectrics
作者: Pan, Tung-Ming
Yen, Li-Chen
Chiang, Chien-Hung
Chao, Tien-Sheng
電子物理學系
Department of Electrophysics
公開日期: 2010
摘要: The structure and electrical properties of a high-k Yb2TiO5 gate dielectric deposited on Si(100) substrates through reactive cosputtering were investigated. X-ray diffraction, X-ray photoelectron spectroscopy and atomic force microscopy were used to study the morphological and chemical features of these films as functions of the growth conditions. The Yb2TiO5 dielectrics annealed at 800 degrees C exhibited a thinner capacitance equivalent thickness, a lower gate leakage current, a smaller density of interface state, and a relatively lower hysteresis voltage compared to those at other annealing temperatures. These results are attributed to the formation of a rather well-crystallized Yb2TiO5 structure and composition.
URI: http://dx.doi.org/10.1149/1.3375608
http://hdl.handle.net/11536/135564
ISBN: 978-1-60768-141-0
ISSN: 1938-5862
DOI: 10.1149/1.3375608
期刊: ADVANCED GATE STACK, SOURCE/DRAIN, AND CHANNEL ENGINEERING FOR SI-BASED CMOS 6: NEW MATERIALS, PROCESSES, AND EQUIPMENT
Volume: 28
Issue: 1
起始頁: 247
結束頁: 252
顯示於類別:會議論文