Large-Scale Atomistic Circuit-Device Coupled Simulation of Discrete-Dopant-Induced Characteristic Fluctuation in Nano-CMOS Digital Circuits

Abstract

The increasing characteristics variability in nano-CMOS devices becomes a major challenge to scaling and integration. In this work, a large-scale statistically sound "atomistic" circuit-device coupled simulation methodology is presented to explore the discrete-dopant-induced characteristic fluctuations in nano-CMOS digital circuits. According to the simulation scenario, the discrete-dopant-induced characteristic fluctuations are examined for a 16-nm-gate MOSFET and inverter circuit. The fluctuations of the intrinsic current-voltage and capacitance-voltage characteristics, and timing behaviors for the explored device and circuit are estimated. The timing fluctuation may result in a significant signal delay in the digital circuit. Consequently, links should be established between circuit design and fundamental device technology to allow circuits and systems to accommodate the individual behavior of every transistor on a silicon chip. The proposed simulation approach could be extended to outlook the fluctuations in various digital and analog circuits.