標題: Recent Advances in ASIC-compatible Circuit Techniques for a SOC in Newly Emerging Application Areas: Invited Paper
作者: Dhong, Sang H.
Hwang, Wei
交大名義發表
National Chiao Tung University
關鍵字: SOC;ASIC;DVFS;0.5V VDD;Pulse latch;IOT
公開日期: 2014
摘要: We review advances in ASIC-compatible circuits for emerging SOC areas. These applications require ubiquitously low-power consumption during standby mode while providing a required performance in active mode. Sub- or near-threshold circuits may provide a low-power solution. However, they have yet to show how they fit into overall SOC optimization including area and performance. Selectively introducing custom-circuit techniques with ASIC tool compatibility have proven very attractive in reducing both the power and the area of a SOC by extending its Dynamic Voltage-Frequency Scaling (DVFS) range down to a VDD of 0.5 V.
URI: http://hdl.handle.net/11536/135886
ISBN: 978-1-4799-5127-7
ISSN: 2163-9612
期刊: 2014 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC)
起始頁: 24
結束頁: 25
顯示於類別:會議論文