完整後設資料紀錄
DC 欄位語言
dc.contributor.authorHuang, Ching-Yingen_US
dc.contributor.authorHu, Roberten_US
dc.date.accessioned2017-04-21T06:49:00Z-
dc.date.available2017-04-21T06:49:00Z-
dc.date.issued2015en_US
dc.identifier.isbn978-1-4799-8767-2en_US
dc.identifier.urihttp://hdl.handle.net/11536/135914-
dc.description.abstractThis paper proposes the wideband active power splitter design where the gain cells are arranged in interleaf rather than the conventional parallel style. By reducing the shunt capacitance of the input transmission line, thus extending its bandwidth, the circuit\'s high-frequency performance can be greatly improved. A DC-40GHz interleaf active power splitter is then designed using 90nm-CMOS process. With 5dB gain, the magnitude and phase imbalance between the two output ports are 0.15dB and 2.6 degrees at 20GHz, and 0.16dB and 14 degrees at 40GHz. The output-port isolation S-23 is mostly below -30dB.en_US
dc.language.isoen_USen_US
dc.titleDC-40GHz Wideband Active Power Splitter Design with Interleaved Transmission-Line Gain Cellsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2015 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC), VOLS 1-3en_US
dc.contributor.department電機學院zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentCollege of Electrical and Computer Engineeringen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000382378800062en_US
dc.citation.woscount0en_US
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