完整後設資料紀錄
DC 欄位語言
dc.contributor.authorCheng, CCen_US
dc.contributor.authorChien, CHen_US
dc.contributor.authorChen, CWen_US
dc.contributor.authorHsu, SLen_US
dc.contributor.authorYang, MYen_US
dc.contributor.authorHuang, CCen_US
dc.contributor.authorYang, FLen_US
dc.contributor.authorChang, CYen_US
dc.date.accessioned2014-12-08T15:18:53Z-
dc.date.available2014-12-08T15:18:53Z-
dc.date.issued2005-06-01en_US
dc.identifier.issn0167-9317en_US
dc.identifier.urihttp://dx.doi.org/10.1016/j.mee.2005.04.033en_US
dc.identifier.urihttp://hdl.handle.net/11536/13593-
dc.description.abstractWe systematically investigated the effect of post-deposition-annealing (PDA) on the electrical characteristics of Ge MOS capacitors with hafnium-oxynitride gate dielectric. The higher PDA temperature and longer PDA time was found to obtain the lower equivalent oxide thickness (EOT) of HfOxNy/Ge gate stack, however, with a larger hysteresis width. A lower EOT of 19.5 angstrom with a low leakage current of 1.8 x 10(-5) A/cm(2) at V-G = -1V was achieved after 600 degrees C annealing for 5 min. The improved capacitor properties after the PDA may be closely related to the different compositions and thicknesses of the resultant interfacial layers.en_US
dc.language.isoen_USen_US
dc.subjectgermaniumen_US
dc.subjecthigh-k gate dielectricen_US
dc.subjectHfOxNyen_US
dc.subjectpost-deposition-annealingen_US
dc.titleImpact of post-deposition-annealing on the electrical characteristics of HfOxNy gate dielectric on Ge substrateen_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1016/j.mee.2005.04.033en_US
dc.identifier.journalMICROELECTRONIC ENGINEERINGen_US
dc.citation.volume80en_US
dc.citation.issueen_US
dc.citation.spage30en_US
dc.citation.epage33en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000231517000008-
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