標題: A Study of Blocking and Tunnel Oxide Engineering on Double-Trapping (DT) BE-SONOS Performance
作者: Lo, Roger
Du, Pei-Ying
Hsu, Tzu-Hsuan
Wu, Chen-Jun
Guo, Jung-Yi
Cheng, Chun-Min
Lue, Hang-Ting
Shih, Yen-Hao
Hou, Tuo-Hung
Hsieh, Kuang-Yeu
Lu, Chih-Yuan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: BE-SONOS;DT BE-SONOS;HQ-SiO2;nitride;reliability;retention;tunnel ONO
公開日期: 2015
摘要: Double-trapping bandgap engineered SONOS (DT BE-SONOS) [1] was proposed to provide both fast erase speed and deep erase by means of a second nitride trapping layer and an additional blocking oxide on top of BE-SONOS. Although this provides excellent erase performance but the additional layers increase the EOT and subsequently the erase voltage, thus it is desirable to minimize their impact. This work investigates exhaustively the effect of thinning down the blocking layers. Since the ISPP and high temperature retention charge loss are mainly dominated by the ONO thickness of BE-SONOS below the blocking layers, reducing the blocking layer thickness has only minor impact on ISPP and retention. Moreover, erase saturation is determined by the dynamic balance of channel hole injection and gate electron injection. Experimental data show that reducing the thickness of the oxide between two trapping layers has little impact on erase saturation once the gate injected electrons are efficiently suppressed by the top most oxide. We have also investigated retention improvement by various oxides. By using HQ-SiO2 to replace the top tunnel ONO the trapped electron out-tunneling is reduced. Thus retention may be improved without increasing the effective oxide thickness.
URI: http://hdl.handle.net/11536/135958
ISBN: 978-1-4673-6933-6
ISSN: 2330-7978
期刊: 2015 IEEE 7TH INTERNATIONAL MEMORY WORKSHOP (IMW)
起始頁: 38
結束頁: 41
顯示於類別:會議論文