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dc.contributor.authorYang, Hao-Yuen_US
dc.contributor.authorHuang, Rei-Fuen_US
dc.contributor.authorSu, Chin-Lungen_US
dc.contributor.authorLin, Kuan-Hongen_US
dc.contributor.authorShu, Hang-Kaungen_US
dc.contributor.authorPeng, Chi-Weien_US
dc.contributor.authorChao, Mango C. -T.en_US
dc.date.accessioned2017-04-21T06:49:16Z-
dc.date.available2017-04-21T06:49:16Z-
dc.date.issued2015en_US
dc.identifier.isbn978-1-4673-6578-9en_US
dc.identifier.issn1089-3539en_US
dc.identifier.urihttp://hdl.handle.net/11536/135985-
dc.description.abstractDue to its capability of parallel search, content addressable memory (CAM) has been widely used on the applications requiring high-speed data search. In recent years, the architectures and design techniques for CAM have been consistently evolving. However, the incoming testing issues for those newly evolved CAM designs are not fully discussed. In this paper, we investigate the testing issues for a new 28nm quaternary CAM, which provides the additional fourth state compared to a conventional ternary CAM and utilizes a charge-sharing sensing scheme for reducing its search power consumption. We first identify the new fault models for this quaternary CAM that are not covered in the conventional CAM testing based on the simulation result, and derive the corresponding test algorithm for those new fault models. The effectiveness of the proposed test algorithm is then validated by the testing result of 7200 28nm sample chips covering different process corners with the help of a newly designed command-based memory BIST.en_US
dc.language.isoen_USen_US
dc.titleTesting Methods for Quaternary Content Addressable Memory Using Charge-Sharing Sensing Schemeen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2015 IEEE INTERNATIONAL TEST CONFERENCE (ITC)en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000370747500031en_US
dc.citation.woscount0en_US
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