完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chang, Chia-Jung | en_US |
dc.contributor.author | Peng, Yin-Chi | en_US |
dc.contributor.author | Chen, Chien-Chih | en_US |
dc.contributor.author | Chen, Tien-Fu | en_US |
dc.contributor.author | Yew, Pen-Chung | en_US |
dc.date.accessioned | 2017-04-21T06:48:27Z | - |
dc.date.available | 2017-04-21T06:48:27Z | - |
dc.date.issued | 2015 | en_US |
dc.identifier.isbn | 978-1-4799-6275-4 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/136068 | - |
dc.description.abstract | For the last decade, there have been varying techniques for hardware prefetching to improve the system performance. However, untimely prefetching may pollution caches and resulting into significant performance degradation. In this work, we introduce an Adaptive Granularity and coordinated Prefetching (AGP) that consists of a coarse-grained and fine-grained prefetched mechanism to provide a better caching environment for parallel applications. AGP targets on the degree-adjusting and location-choosing and tries to minimize the influence caused by prefetcher for each core. AGP could produce more timely prefetched requests reducing the cache pollutions and contentions. Across a variety of PARSEC benchmarks, AGP can contribute 6.5% (up to 36%) of performance improvement on a 4-core multicore system compared to the non-prefetching. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Adaptive Granularity and Coordinated Management for Timely Prefetching in Multi-Core Systems | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2015 International symposium on VLSI Design, Automation and Test (VLSI-DAT) | en_US |
dc.contributor.department | 資訊工程學系 | zh_TW |
dc.contributor.department | Department of Computer Science | en_US |
dc.identifier.wosnumber | WOS:000380584400085 | en_US |
dc.citation.woscount | 0 | en_US |
顯示於類別: | 會議論文 |