標題: A Power-Aware Quad-Voltage H.264 Encoder Chip for Wireless Panoramic Endoscope Applications
作者: Xiao, An-Tia
Yang, Shiang-Ren
Miao, Yuan-Hsiang
Cheng, Ching-Hwa
Guo, Jiun-In
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: multiple-voltage low power design;H.264 encoder;power-aware design
公開日期: 2015
摘要: Voltage scaling is an efficient way to reduce dynamic power consumption for digital circuits. In this paper, a hierarchical multiple voltage ( HMulti-Vdd) technology is proposed to design a power-aware H.264 intra-frame encoder for wireless panoramic endoscope applications. The proposed design adopts quad supply voltages to reduce power consumption without performance degradation. A progressive voltage difference technique is adopted in the proposed design for preventing from the penalty from using level shifters on performance and power consumption. The quad-voltage test chip has been successfully validated and has shown a 40% average reduction of power consumption, as compared to the same design using a single supply voltage.
URI: http://hdl.handle.net/11536/136082
ISBN: 978-1-4799-6275-4
期刊: 2015 International symposium on VLSI Design, Automation and Test (VLSI-DAT)
顯示於類別:會議論文