A 38mW 40Gb/s 4-Lane Tri-Band PAM-4 / 16-QAM Transceiver in 28nm CMOS for High-Speed Memory Interface

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	Cho, Wei-Han	en_US
dc.contributor.author	Li, Yilei	en_US
dc.contributor.author	Du, Yuan	en_US
dc.contributor.author	Wong, Chien-Heng	en_US
dc.contributor.author	Du, Jieqiong	en_US
dc.contributor.author	Huang, Po-Tsang	en_US
dc.contributor.author	Lee, Sheau Jiung	en_US
dc.contributor.author	Chen, Huan-Neng	en_US
dc.contributor.author	Jou, Chewn-Pu	en_US
dc.contributor.author	Hsueh, Fu-Lung	en_US
dc.contributor.author	Chang, Mau-Chung Frank	en_US
dc.date.accessioned	2017-04-21T06:49:54Z	-
dc.date.available	2017-04-21T06:49:54Z	-
dc.date.issued	2016	en_US
dc.identifier.isbn	978-1-4673-9467-3	en_US
dc.identifier.issn	0193-6530	en_US
dc.identifier.uri	http://hdl.handle.net/11536/136199	-
dc.language.iso	en_US	en_US
dc.title	A 38mW 40Gb/s 4-Lane Tri-Band PAM-4 / 16-QAM Transceiver in 28nm CMOS for High-Speed Memory Interface	en_US
dc.type	Proceedings Paper	en_US
dc.identifier.journal	2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)	en_US
dc.citation.volume	59	en_US
dc.citation.spage	184	en_US
dc.citation.epage	U250	en_US
dc.contributor.department	交大名義發表	zh_TW
dc.contributor.department	National Chiao Tung University	en_US
dc.identifier.wosnumber	WOS:000382151400071	en_US
dc.citation.woscount	0	en_US
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