A 38mW 40Gb/s 4-Lane Tri-Band PAM-4 / 16-QAM Transceiver in 28nm CMOS for High-Speed Memory Interface

標題:	A 38mW 40Gb/s 4-Lane Tri-Band PAM-4 / 16-QAM Transceiver in 28nm CMOS for High-Speed Memory Interface
作者:	Cho, Wei-Han Li, Yilei Du, Yuan Wong, Chien-Heng Du, Jieqiong Huang, Po-Tsang Lee, Sheau Jiung Chen, Huan-Neng Jou, Chewn-Pu Hsueh, Fu-Lung Chang, Mau-Chung Frank 交大名義發表 National Chiao Tung University
公開日期:	2016
URI:	http://hdl.handle.net/11536/136199
ISBN:	978-1-4673-9467-3
ISSN:	0193-6530
期刊:	2016 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)
Volume:	59
起始頁:	184
結束頁:	U250
顯示於類別：	Conferences Paper