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dc.contributor.authorLiu, Chun-Yien_US
dc.contributor.authorSie, Meng-Siouen_US
dc.contributor.authorLeong, Edmund Wen Jenen_US
dc.contributor.authorYao, Yu-Chengen_US
dc.contributor.authorLopez, Henryen_US
dc.contributor.authorJen, Chih-Weien_US
dc.contributor.authorLiu, Wei-Changen_US
dc.contributor.authorJou, Shyh-Jyeen_US
dc.date.accessioned2017-04-21T06:48:54Z-
dc.date.available2017-04-21T06:48:54Z-
dc.date.issued2016-12en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2016.2622759en_US
dc.identifier.urihttp://hdl.handle.net/11536/136343-
dc.description.abstractFilter bank multi-carrier (FBMC) is a kind of new waveform that is an important topic in 5th generation wireless systems (5G). In this paper, we propose a novel memory access reordering polyphase network (PPN) for FBMC offset QAM (OQAM) system at 60 GHz band. The novel PPN architecture has lower complexity than the state-of-the-art designs, and it can be used in any FBMC-OQAM baseband design. To evaluate the system performance and hardware complexity of baseband receiver in millimeter wave (mmW) band, the proposed PPN is integrated into our 8X-parallelism 60 GHz band baseband receiver. The out-of-band (OOB) radiation in fixed-point simulation has 25 dB improvement as compared with OFDM. Furthermore, the transmission efficiency of FBMC-OQAM baseband receiver can improve 52% due to using more data subcarriers and removal of cyclic prefix (CP). The proposed PPN is synthesized with 40 nm 1P9M general purposes (GP) process, and can operate at 330/500 MHz clock rate with power consumption of 17/26 mW, providing the maximum PHY data rate up to 21.4 Gb/s.en_US
dc.language.isoen_USen_US
dc.subjectBaseband receiveren_US
dc.subjectfilter bank multi-carrier (FBMC)en_US
dc.subjectmillimeter wave (mmW)en_US
dc.subjectoffset QAM (OQAM)en_US
dc.subjectwirelessen_US
dc.titleAn 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiveren_US
dc.typeArticle; Proceedings Paperen_US
dc.identifier.doi10.1109/TCSI.2016.2622759en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume63en_US
dc.citation.issue12en_US
dc.citation.spage2347en_US
dc.citation.epage2356en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000389338300024en_US
dc.citation.woscount0en_US
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