| 標題: | Performance Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits |
| 作者: | Yu, Chang-Hung Su, Pin Chuang, Ching-Te 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
| 公開日期: | 2016 |
| URI: | http://hdl.handle.net/11536/136434 |
| ISBN: | 978-1-4673-9478-9 |
| ISSN: | 1930-8868 |
| 期刊: | 2016 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA) |
| 顯示於類別： | 會議論文 |
- Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells / Yu, Chang-Hung;Su, Pin;Chuang, Ching-Te
- Performance and Stability Benchmarking of Monolithic 3-D Logic Circuits and SRAM Cells With Monolayer and Few-Layer Transition Metal Dichalcogenide MOSFETs / Yu, Chang-Hung;Su, Pin;Chuang, Ching-Te
- Performance Evaluation of Pass-Transistor-Based Circuits using Monolayer and Bilayer 2-D Transition Metal Dichalcogenide (TMD) MOSFETs for 5.9nm Node / Yu, Chang-Hung;Zheng, Jun-Teng;Su, Pin;Chuang, Ching-Te
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