完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChiu, Yu-Chienen_US
dc.contributor.authorChang, Chun-Yenen_US
dc.contributor.authorYen, Shiang-Shiouen_US
dc.contributor.authorFan, Chia-Chien_US
dc.contributor.authorHsu, Hsiao-Hsuanen_US
dc.contributor.authorCheng, Chun-Huen_US
dc.contributor.authorChen, Po-Chunen_US
dc.contributor.authorChen, Po-Weien_US
dc.contributor.authorLiou, Guan-Linen_US
dc.contributor.authorLee, Min-Hungen_US
dc.contributor.authorLiu, Chienen_US
dc.contributor.authorChou, Wu-Chingen_US
dc.date.accessioned2017-04-21T06:48:21Z-
dc.date.available2017-04-21T06:48:21Z-
dc.date.issued2016en_US
dc.identifier.isbn978-1-4673-9136-8en_US
dc.identifier.issn1541-7026en_US
dc.identifier.urihttp://hdl.handle.net/11536/136458-
dc.description.abstractIncorporating a charge-trapped ZrSiO with ferroelectric HfZrO dielectrics, we demonstrated a gate-injection versatile memory with sub-60mV/dec subthreshold swing (SS) and large threshold voltage window (Delta V-T) of >2V under a fast 20-ns speed. Moreover, it is revealed that the local defects at ZrSiO/HfZrO interface affect the ferroelectric negative capacitance tuning and thus increases the variability of V-T and SS during 10(12) cycling endurance.en_US
dc.language.isoen_USen_US
dc.subjectnonvolatile memoryen_US
dc.subjectferroelectric polarizationen_US
dc.subjectcharge trappingen_US
dc.subjectHfZrOen_US
dc.titleOn the Variability of Threshold Voltage Window in Gate-Injection Versatile Memories with Sub-60mV/dec Subthreshold Swing and 10(12)-Cycling Enduranceen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2016 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)en_US
dc.contributor.department電子物理學系zh_TW
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electrophysicsen_US
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000387121900120en_US
dc.citation.woscount0en_US
顯示於類別:會議論文