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dc.contributor.authorChao, Mango C. -T.en_US
dc.contributor.authorYang, Hao-Yuen_US
dc.contributor.authorHuang, Rei-Fuen_US
dc.contributor.authorLin, Shih-Chinen_US
dc.contributor.authorChin, Ching-Yuen_US
dc.date.accessioned2014-12-08T15:19:21Z-
dc.date.available2014-12-08T15:19:21Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-60558-497-3en_US
dc.identifier.issn0738-100Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/13823-
dc.description.abstractIn this paper, we compare embedded-DRAM (eDRAM) testing to both SRAM testing and commodity-DRAM testing, since an eDRAM macro uses DRAM cells with an SRAM interface. We first start from an standard SRAM test algorithm and discuss the faults which are not covered in the SRAM testing but should be considered in the DRAM testing. Then we study the behavior of those faults and the tests which can detect them. Also, we discuss how likely each modeled fault may occur on eDRAMs and commodity DRAMs, respectively.en_US
dc.language.isoen_USen_US
dc.subjectMemory testingen_US
dc.subjectembedded DRAMen_US
dc.titleFault Models for Embedded-DRAM Macrosen_US
dc.typeArticleen_US
dc.identifier.journalDAC: 2009 46TH ACM/IEEE DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2en_US
dc.citation.spage714en_US
dc.citation.epage719en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000279394200145-
Appears in Collections:Conferences Paper