利用實驗設計方法改善金屬層間介電質層問題-以X晶圓代工廠為例

Abstract

近年來由於半導體製程技術不斷的提升，積體電路朝向體積小、密度高以及運算速度快，使得晶圓代工廠必須不斷提升其製程技術，在晶圓製造中，影響晶圓良率(Circuit Probe,CP)的因素有很多，為了協助Ｘ公司改善介電質薄膜問題進而改善晶圓良率，本研究透過實驗設計（Ｄesign of experiment, DOE)，於影響介電質薄膜沉積製程配方參數中找出顯著因子，藉由實驗結果，透過變異數分析(Analysis of Variance,ANOVA)了解各顯著因子的影響後發現藉由控制製程配方參數中的射頻功率(Radio Frequency,RF)與反應腔體清潔的頻率，可以改善介電質薄膜品質進而改善晶圓良率，此研究成果除了改善X晶圓廠介電質薄膜問題並且提升晶圓良率，也提供給晶圓代工廠及業界在追求薄膜品質以及晶圓良率提升作為參考

In recent years，due to the semiconductor manufacturing process technology continues to improve，The IC design towards small size， high density and speed， the foundry must constantly improve their process technology in wafer manufacture,，There are a lot of factors to influence the CP (Circuit Probe, CP) ，in order to help X company improve the dielectric film problem to improve the CP, this research through the experimental design (Design of experiment, DOE) to find out the significant factors which affecting the dielectric of thin film deposition process parameters in the formula，by the experimental results， through the analysis of variance (Analysis of Variance, ANOVA) to understand the effect of each factor and found by controlling RF power of the process parameters in the formula (Radio Frequency, RF) and the chamber cleaning frequency can improve the dielectric film quality then improve the CP, the research results can improve the dielectric problem of the Thinfilm and the CP of the X foundry also. The research can provide the experience to improve thinfilm quality and foundry CP as reference.