完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Wu, MS | en_US |
dc.contributor.author | Lee, CL | en_US |
dc.date.accessioned | 2014-12-08T15:19:38Z | - |
dc.date.available | 2014-12-08T15:19:38Z | - |
dc.date.issued | 2005-03-01 | en_US |
dc.identifier.issn | 0740-7475 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/MDT.2005.49 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/13963 | - |
dc.description.abstract | This BIST scheme simplifies the detection of crosstalk faults in deep-submicron VLSI circuits in the boundary scan environment. Simulation results show that with just a few random patterns fault coverage for. most large benchmark circuits can exceed 90%. | en_US |
dc.language.iso | en_US | en_US |
dc.title | Using a periodic square wave test-signal to detect crosstalk faults | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/MDT.2005.49 | en_US |
dc.identifier.journal | IEEE DESIGN & TEST OF COMPUTERS | en_US |
dc.citation.volume | 22 | en_US |
dc.citation.issue | 2 | en_US |
dc.citation.spage | 160 | en_US |
dc.citation.epage | 169 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000228102300009 | - |
dc.citation.woscount | 12 | - |
顯示於類別: | 期刊論文 |