完整後設資料紀錄
DC 欄位語言
dc.contributor.authorWu, MSen_US
dc.contributor.authorLee, CLen_US
dc.date.accessioned2014-12-08T15:19:38Z-
dc.date.available2014-12-08T15:19:38Z-
dc.date.issued2005-03-01en_US
dc.identifier.issn0740-7475en_US
dc.identifier.urihttp://dx.doi.org/10.1109/MDT.2005.49en_US
dc.identifier.urihttp://hdl.handle.net/11536/13963-
dc.description.abstractThis BIST scheme simplifies the detection of crosstalk faults in deep-submicron VLSI circuits in the boundary scan environment. Simulation results show that with just a few random patterns fault coverage for. most large benchmark circuits can exceed 90%.en_US
dc.language.isoen_USen_US
dc.titleUsing a periodic square wave test-signal to detect crosstalk faultsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/MDT.2005.49en_US
dc.identifier.journalIEEE DESIGN & TEST OF COMPUTERSen_US
dc.citation.volume22en_US
dc.citation.issue2en_US
dc.citation.spage160en_US
dc.citation.epage169en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000228102300009-
dc.citation.woscount12-
顯示於類別:期刊論文


文件中的檔案:

  1. 000228102300009.pdf

若為 zip 檔案,請下載檔案解壓縮後,用瀏覽器開啟資料夾中的 index.html 瀏覽全文。