以氧化鑭/二氧化矽堆疊式氧化層作為高功率增強型氮化鎵金屬-絕緣體-半導體高電子遷移率電晶體的閘極介電層之研究

Abstract

由於氮化鎵增強型金屬-絕緣體-半導體高電子遷移率電晶體能提供系統安全、降低耗能以及簡化電路之設計，因此近幾年氮化鎵元件之研究發展廣受注目；然而，當元件操作於閘極高正偏壓下，二維電子氣通道的電子會被閘極吸引而進入在絕緣體與半導體之間的深層能階，進而造成起始電壓的不穩定性和遲滯效應，並影響元件的輸出電性表現，所以閘極絕緣層的開發與研究變成氮化鎵增強型金屬-絕緣體-半導體元件在實際應用之重要的課題。 本研究使用堆疊式氧化鑭/二氧化矽做閘極嵌入式增強型金屬-絕緣體-半導體高電子遷移率電晶體，以期能降低與半導體接面的深層能階密度來改善遲滯現象，從實驗結果中，我們證明了堆疊式氧化鑭/二氧化矽具有很好的接面品質且有效減少遲滯現象和帶來穩定的起始電壓。 此研究可分為兩個部分，在第一部分，先藉由堆疊式氧化鑭/二氧化矽氮化鋁鎵/氮化鎵電容器測試閘極氧化層品質；實驗結果顯示，使用堆疊式氧化鑭/二氧化矽做為絕緣層有最佳的電性表現，且藉由電容-電壓曲線、遲滯現象與X光光電子能譜儀的分析也確認了堆疊式氧化鑭/二氧化矽本身與半導體接面具有較佳的品質。 第二部分使用堆疊式氧化鑭/二氧化矽應用在閘極嵌入式增強型金屬-絕緣體-半導體高電子遷移率電晶體上，以探討閘極漏電對於元件的輸出電性表現的影響、崩潰電壓的提升、高汲極偏壓元件之動態電阻的穩定度以及改善起始電壓的不穩定性。研究結果最後驗證多層堆疊氧化鑭/二氧化矽閘極嵌入式增強型元件具有相當好的絕緣體/半導體接面品質，使我們的元件表現出高電流 (752 mA/mm)、高轉導 (210 mS/mm)、高崩潰電壓 (440 V with LGD = 5 μm & 670 V with LGD = 10 μm)、低遲滯 (50 mV)和低阻值 (7.6 Ω•mm)，證實了我們的元件非常適用於高功率應用。

It is necessary to fabricate enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor high electron mobility transistor (MIS-HEMT) in views of safety issue, low power consumption and simple design on the circuit. However, when the E-mode AlGaN/GaN MIS-HEMT is used for high power device, the high positive gate voltage may induce the electrons in the 2DEG channel into the deep states at the interface between insulator and AlGaN layer, and results in the threshold voltage instability and hysteresis effect. It would influence the output performance of E-mode MIS-HEMT device. Therefore, choosing gate insulator becomes a key point in E-mode MIS-HEMT. In my study, I chose multilayer La2O3/SiO2 as gate insulator to fabricate E-mode MIS-HEMT with lower deep state density in the interface between gate insulator and semiconductor to reduce hysteresis effect and threshold voltage instability. There two topics in this study. In first part, La2O3/SiO2 MOS-capacitor was used to identify oxide quality. The experimental results of La2O3/SiO2 AlGaN/GaN MOS-capacitor showed best electrical property with great interface quality between La2O3/SiO2 and semiconductor verified by C-V measurement, hysteresis effect and X-ray Photoelectron Spectroscopy (XPS) analysis. In second part, we applied multilayer La2O3/SiO2 to be gate insulator in the fabrication of a gate recessed E-mode AlGaN/GaN MIS-HEMT and compared with conventional E-mode schottky HEMT to investigate the gate leakage current influence on the output performance, the breakdown voltage improvement, the dynamic on-resistance stability under high drain voltage hoping to improve Vth instability effectively. From these measurements, we found the gate recessed La2O3/SiO2 E-mode AlGaN/GaN MIS-HEMT exhibited high ID,max (752 mA/mm), high Gm (210 mS/mm), high BV (440 V with LGD = 5 μm & 670 V with LGD = 10 μm), low hysteresis (50 mV), low Ron (7.6 Ω•mm) due to excellent interface quality between La2O3/SiO2 and semiconductor proved that our device was very suitable for high power application.