標題: | 基於異質多核心處理器OpenCL模擬器之程式效能、功耗、熱能分析 Performance, Power and Thermal Analysis of Program Execution in Different Architecture Design Based on OpenCL Simulator for Heterogeneous Multicore Processors |
作者: | 許勝傑 曹孝櫟 Shu, Sheng-Jie Tsao, Shiao-Li 資訊科學與工程研究所 |
關鍵字: | gem5-gpu;opencl;效能;功耗;熱能;gem5-gpu;opencl;Performance;Power;Thermal |
公開日期: | 2016 |
摘要: | 近年來,將各式各樣的處理器或/及FPGA等異質架構整合到單一晶片上為主要的發展趨勢。而為了有效率的開發異質架構平台程式,提出了開放計算語言(OpenCL)。利用OpenCL可以開發出跨作業系統且高效能低功耗的程式。
異質平台的物理現象比傳統平台複雜得多,在晶片上的每個元件彼此會互相影響。因此開發異質平台程式需要考慮到整個晶片上的系統。然而目前缺乏在不同異質平台上執行OpenCL程式分析的研究。且缺乏OpenCL程式的模擬器用以評估矽前階段的硬體設計。
在本論文中提出一個模擬平台,可以提供異質平台設計的OpenCL程式的效能和功耗以及熱的資訊。提出的模擬平台基於週期精確性能模擬的結果來計算每個功能模塊的功耗以及熱狀態。根據這些效能和功耗以及熱狀態的資訊,重新分配元件工作負載來獲取最佳的系統行為。 In recent years, heterogeneous hardware architectures become the main trend of development which includes various kinds of processors and/or FPGA into one single chip. In order to develop efficient applications for heterogeneous architecture platform, Open Computing Language (OpenCL) is proposed as required. The applications developed in OpenCL can contain cross operating system, high performance and low power characteristics. The physical phenomena of heterogeneous platform are considerably complicated than conventional platform. Each device designed in a chip can mutual affect each other. Therefore, developing applications for heterogeneous platform requires considering overall system on a chip. However, there is still lack of study providing analysis of various OpenCL application designs executed in different heterogeneous platforms. Moreover, there is lacking a simulator for OpenCL applications, which can evaluate OpenCL applications and hardware design in pre-silicon stage. In this thesis, we propose a simulation platform which can provide performance, power and thermal information of OpenCL applications executed in a heterogeneous platform design. The proposed simulation platform compute the power consumption and thermal state of each function block in a processor based on the result of cycle-accurate performance simulation. According to these performance, power and thermal information, the workload of the devices in a chip can be reorganized for optimal system behavior. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070356046 http://hdl.handle.net/11536/140119 |
顯示於類別: | 畢業論文 |