| 標題: | A New VLSI 2-D Fourfold-Rotational-Symmetry Filter Architecture Design |
| 作者: | Chen, Pei-Yu Van, Lan-Da Reddy, Hari C. Lin, Chin-Teng 資訊工程學系 Department of Computer Science |
| 公開日期: | 2009 |
| 摘要: | In this paper, we propose two new two-dimensional (2-D) IIR and FIR filter architectures for 2-D transfer function using fourfold rotational symmetry. The presented type-I structure with fourfold rotational symmetry has the lowest number of multipliers, and zero latency. Importantly, the proposed type-II IIR filter possesses high speed, local broadcast, and the same number of multipliers and latency as the type I shows at expense of a slight increment of number of delay elements. |
| URI: | http://hdl.handle.net/11536/14100 |
| ISBN: | 978-1-4244-3827-3 |
| 期刊: | ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 |
| 起始頁: | 93 |
| 結束頁: | 96 |
| 顯示於類別: | 會議論文 |

