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dc.contributor.authorHu, Vita Pi-Hoen_US
dc.contributor.authorWu, Yu-Shengen_US
dc.contributor.authorFan, Ming-Longen_US
dc.contributor.authorSu, Pinen_US
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2014-12-08T15:19:54Z-
dc.date.available2014-12-08T15:19:54Z-
dc.date.issued2009en_US
dc.identifier.isbn978-1-60558-684-7en_US
dc.identifier.urihttp://hdl.handle.net/11536/14111-
dc.description.abstractThis paper analyzes the stability, margin, and performance of Ultra-Thin-Body (UTB) SOI 6T/8T SRAM cells operating in subthreshold region. An analytical SNM model for UTB SOI 6T/8T SRAM cells operating in the subthreshold region is presented to investigate the Read SNM (RSNM) and Write SNM (WSNM). Our results indicate that back-gating technique is more effective in the subthreshold region than in the superthreshold region for improving RSNM and WSNM. The UTB SOI 6T SRAM cell with back-gating technique to increase the strength of the pull-up transistors and decrease the strength of the pass-gate transistors shows comparable RSNM in the subthreshold region with the 10T bulk subthreshold SRAM cell and an improvement in RSNM variation. Due to better electrostatic integrity, back-gating technique (pull-up PFET with positive back-gate bias, pull-down/pass-gate NFET's with negative back-gate bias) mitigates the 6T UTB SOI SRAM RSNM variation significantly with some improvement in RSNM. Increasing cell beta-ratio shows limited improvement on RSNM and has no benefit on SNM variability for subthreshold operation. The UTB SOI 8T SRAM cell exhibits RSNM 2X larger than the 6T SRAM cell in the subthreshold region. Mixed-mode device/circuit simulations show that 6T/8T UTB SOI SRAMs operating in the subthreshold region can meet/support the stability, leakage/density, and frequency requirements for intended application space of subthreshold SRAMs.en_US
dc.language.isoen_USen_US
dc.subjectUltra-Thin-Bodyen_US
dc.subjectSOIen_US
dc.subjectPoisson's equationen_US
dc.subjectSubthreshold SRAMen_US
dc.subjectStatic Noise Marginen_US
dc.titleDesign and Analysis of Ultra-Thin-Body SOI Based Subthreshold SRAMen_US
dc.typeArticleen_US
dc.identifier.journalISLPED 09en_US
dc.citation.spage9en_US
dc.citation.epage14en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000282718300003-
Appears in Collections:Conferences Paper