應用於每秒兆位元無線傳輸系統之毫米波频率合成器

Abstract

基於無線千兆聯盟(WiGig)所提出的高速無線網路60 GHz Wifi 標準( IEEE 802.11ad )，為了將傳輸速率提升至10Gbps，本論文修改802.11ad中的頻譜遮罩，重新定義每個頻道的中心頻率，並且提升所需的相位雜訊要求，然而，在寬操作頻率(47.5~52.5 GHz)及低相位雜訊( <-93dBc/Hz @1MHz)的要求下，對高頻之頻率合成器更不易設計。本論文提出一頻率合成器，其操作電壓為1V，採用互補式交叉耦合諧振電壓控制振盪器(LC VCO)，可降低相位雜訊的輸出；前兩級之迴路除頻器選用電流模式邏輯除頻器(CML Divider)，有足夠的操作範圍及減小面積等優點；此論文於台積28奈米半導體製程下實現，在不同的輸出頻率下，頻率合成器消耗的總功率都在22 mW以下，相位雜訊方面，呈現的結果為 -102 dBc/Hz @1 MHz以下，為低功耗、低相位雜訊的頻率合成器。

In order to increase data rate of IEEE 802.11ad proposed by WiGig to 10Gbps, this paper modifies spectrum mask, redefines center frequency of each channel, and increases phase noise constrain. However, under wide range of operating frequency (47.5~52.5 GHz) and low phase noise (-93dBc/Hz@1MHz) requirements, such high frequency synthesizer is more difficult for circuit design. This paper proposes a frequency synthesizer that operates at 1V. It adopts complementary cross couple LC voltage control oscillator which can lower phase noise of output and uses CML divider which can provide enough operation range and lower consumption of area. This work implements in 28 nm CMOS technology. The simulation of synthesizer shows that the average power consumption is below 22 mW at operating range, and the phase noise at output is around -102dBc/Hz @1MHz.