標題: | 基於線性最小均方差原則之通道估計於38 GHz OFDMA下行傳輸之數位訊號處理器實現與最佳化 Implementation and Optimization of LMMSE-Based Channel Estimation for 38 GHz OFDMA Downlink Transmission on A Digital Signal Processor |
作者: | 陳治維 林大衛 Chen, Chih-Wei Lin, Ta-Wei 電子研究所 |
關鍵字: | 線性最小均方差;數位訊號處理器;通道估計;最佳化;LMMSE;Digital Signal Processor;Channel Estimation;Optimization |
公開日期: | 2017 |
摘要: | 在本篇論文中,我們根據第五代行動通訊所設計的工業技術研究院(工研院)38 GHz系統規格,討論OFDMA下行通道估計。我們使用MATLAB模擬通道估計,也在數位訊號處理器實現並進行效能分析。我們採用線性最小均方差的通道估測技術。首先,因其較低的複雜度,使用最小平方差的估測位於導訊(pilot)上的通道頻率響應,接著做一次移動平均降低雜訊,其次估計延遲參數並利用指數函數的功率延遲曲線求出相關函數,然後根據相關函數做線性最小均方差,估測其他資料載波上的通道頻率響應,最後採用線性內插法來估計在兩導訊中間的通道頻率響應。在工研院系統中,我們在AWGN 通道及多路徑通道上驗證我們的通道估測方法。數位訊號處理器方面,我們使用德州儀器公司的TCI6638K2K,並且使用定點數實現,在最佳化的過程中使用Math以及fast RTS的library,透過記憶體的共用以及程式平行化的改寫使執行時間以及占用的記憶體壓到最低,最後再成功的與工研院的驗證平台做整合。在本篇論文中,我們首先介紹OFDMA及工研院的下行傳輸標準機制,接著描述我們採用的通道估測方法,然後簡介數位訊號處理器的使用環境並最佳化程式,最後在不同傳輸環境下模擬和實作並討論其效能。 In this thesis, we study OFDMA downlink channel estimation based on the Industrial Technology Research Institute (ITRI) system designed for 5G cellular communications operating at 38 GHz. We simulate the channel estimation method with MATLAB and implement on digital signal processor (DSP) to analysis the performance. For the channel estimation method, we first use least-square (LS) estimator on pilot subcarriers because of its low computational complexity, then we do one time moving average (MA) to reduce noise power. After that we estimate the delay parameters and find correlation function with exponential power delay profile (PDP). Based on correlation function, we do linear minimum-mean square error (LMMSE) filtering to estimate the channel frequency responses at other data subcarriers. Finally we do linear interpolation between two pilot locations in time. We verify our channel estimation program in additive white Gaussian noise (AWGN) channel and multipath channel for ITRI systems. Regarding DSP implementation, the platform we used is TCI6638K2K of Texas Instrument (TI). We implement in fix point and use the library of math and fast RTS supported by TI. We reduce the cycle time and memory by sharing memory and paralleling the code. In the last, we successfully combine our algorithm with ITRI proof-of-concept platform. In this thesis, we first introduce the standard of the OFDMA and the ITRI downlink transmission specification. Then we describe channel estimation method we use. Next, we introduce DSP implementation environment and optimization of program. Finally, we do the simulation and implementation and discuss the performance in each transmission condition. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070450224 http://hdl.handle.net/11536/141387 |
Appears in Collections: | Thesis |