氧化錫薄膜與P型氧化亞錫電晶體之研製與分析

Abstract

在本論文中，我們成功地利用反應式直流磁控濺鍍系統在改變氧分壓條件製備三種類型的氧化錫薄膜，接著在低氧環境中對薄膜進行300度退火30分鐘，在低氧分壓(0.23 mTorr)的沉積條件中，退火後，從N型錫主導(Sn-dominant)轉變成P型錫化亞錫主導(SnO-dominant)的氧化錫薄膜；在中氧分壓區(0.33~0.51 mTorr)的沉積條件中，薄膜的成分皆為高阻態；在高氧分壓(0.60 mTorr)的沉積條件中，薄膜的成分則為N型二氧化錫。本論文著重於P型氧化亞錫薄膜電晶體的製作與特性分析，因此我們選用上述低氧分壓(0.23 mTorr)沉積條件來製備P型錫化亞錫薄膜，並採用背電極結構來製作薄膜電晶體。首先，探討在低氧或真空環境退火對薄膜電晶體的電性影響，這兩種退火條件下，都獲得不錯的元件特性，包括大於103的電流開關比、場效載子遷移率分別為3.97和4.66 cm2/V-s，這些初步結果相當接近過去文獻中最好的成果。 為了更加瞭解退火時薄膜的轉態過程，我們把剛完成製作的氧化錫薄膜電晶體進行累積式退火(cumulative annealing)的實驗，每次15分鐘的退火後進行元件電性與物性量測分析。元件特性從N型載子過多導致無法有效地閘控的狀態，轉變成高阻值通道，再轉成P型的開關特性。藉由光學顯微鏡下觀察通道層的變化，我們提出薄膜結晶過程的示意圖來解釋上述結構的轉換。我們也探討不同閘極氧化層(SiO2, HfO2, and Al2O3)對氧化錫薄膜結晶過程的影響。氧化錫薄膜電晶體使用SiO2作為閘極氧化層最先獲得P型開關特性，接著是HfO2¬，Al2O3需要最長的退火時間。 此論文也探討以二氧化矽與氮化矽作為P型氧化亞錫薄膜電晶體保護層的影響。電晶體之臨界電壓(threshold voltage, VTH) 在沉積保護層後往負的方向偏移，表示通道層的電洞濃度下降，我們歸咎於電漿中氧或氮自由基與氧化亞錫之間的化學反應而生成些許N型二氧化錫。保護層也使得薄膜電晶體的次臨界擺幅(subthreshold swing, S.S.)變好並延長元件操作的壽命。在保護層沉積溫度為300度時，薄膜電晶體的開啟電流較其他低溫沉積的元件變小很多，我們認為P型氧化亞錫薄膜電晶體不能承受過多的熱效應，要不然將生成N型二氧化錫導致元件特性劣化。 最後，我們建構獨立雙閘極P型氧化亞錫薄膜電晶體。當元件在雙閘極(double gate, DG)操作下，對比於元件在單閘極操作下的飽和總電流其飽和電流提升25%，其原因為載子導通於通道中間區域，較遠離通道介面處，載子受到較少的表面散射(surface scattering)。另外，雙閘元件臨界電壓的調控性也獲得證實。在波長370奈米照光測試下，此元件的上電極能有效地反射入射光，元件特性因此未受到照光影響。

In this dissertation, we’ve successfully prepared three types of SnOx films deposited at various oxygen partial pressures (PO) by a reactive DC sputtering system. After being annealed in a low O2-containing ambience at 300oC for 30 minutes, the state of the SnOx films deposited at low PO (0.23 mTorr) is changed from n-type Sn-dominant to p-type SnO-dominant, while the SnOx films deposited at medium (0.33~0.51 mTorr) and high PO (0.60 mTorr) are high-resistivity and n-type SnO2, respectively. From the above results, the films deposited at low PO (0.23 mTorr) were adopted for fabricating p-type TFTs with bottom-gated configuration. The impact of annealing ambiences on electrical characteristics of the SnOx TFTs is studied first. The devices annealed in either O2 or vacuum ambience show decent performance in terms of high Ion/Ioff (>103) and good field-effect mobility (3.96 and 4.66 cm2/V-s). These results are comparable to the best values ever reported in the literature. To gain more insights into the transformation in the structure of the SnOx channel films, the as-fabricated SnOx TFTs were treated with a series of cumulative annealing (CA) steps in O2 ambience. Duration of each CA step was 15 minutes. After being annealed for CA time of 45 minutes, operation of the annealed device is changed from non-gated, to high channel resistance, and finally to p-type. The channel region of the device is inspected by an optical microscopy (OM). Based on the observations, we propose a schematic model which describes the nucleation and crystallization processes of the channel film during the annealing. The model is also supported by the results of several material analyses which reveal that the film is gradually changed from n-type Sn-dominant to p-type SnO-dominant with increasing annealing. We also investigate the impact of different gate dielectrics (SiO2, HfO2, and Al2O3) on the nucleation and crystallization processes in the SnOx channel. As compared with the case of SiO2, the processes are retarded with the gate oxide of HfO2 and Al2O3. The latter case needs the longest annealing time to transform the channel into p-type. The influences of depositing a passivation layer (SiOx or a SiNx) on the characteristics of p-type SnOx TFTs are also studied. The VTH of the passivated devices is shifted and becomes more negative. This is owing to the interactions of O and N radicals in the plasma with the channel film which result in a reduction in hole concentration. The subthreshold swing of the passivated devices and the long-term durability are improved apparently. However, the on-state current is degraded significantly when the annealed devices were passivated at 300oC as compared to those passivated at lower temperatures. This implies excessive thermal budget would degrade the p-type SnOx film. Lastly, we’ve fabricated p-type SnOx TFTs with a double-gated structure. The result shows 25% improvement in saturation current of the device measured under the DG mode as compared with the sum of two individual single-gate modes is achieved. For DG-mode operation the carriers accumulating in the middle of the channel may suffer less from the surface scattering. Furthermore, effective tuning capability of VTH is demonstrated with the DG scheme. Under a light stressing test at 370 nm of wavelength, the electrical characteristics are not affected as the top gate effectively blocks the incident light.