标题: | 基于类费氏数列架构之准循环低密度奇偶检查码再编码预处理技术 Pre-processing technique for Modified Fibonacci-like QC-LDPC code with Re-encoding scheme |
作者: | 陈骧 陈绍基 Chen, Shiang Chen, Sau-Gee 电子研究所 |
关键字: | 低密度奇偶检查码;类费氏数列;再编码预处理;通道编码;QC-LDPC;Fibonacci-like;Re-encoding;Pre-processing |
公开日期: | 2017 |
摘要: | 低密度奇偶检查码(LDPC)为一种效能非常接近夏侬极限(Shannon limit)的编解码系统,在近年被广泛讨论。虽然LDPC码有很好的解码效能,但仍需要大量的时间在递回解码过程中的运算。低密度奇偶检查码的效能,包括解码的位元错误率、解码的吞吐量、解码耗能或解码时间等。为提高LDPC码效能,长码长的码字设计必不可少。由于解码需要先接收到完整码字才能开始做解码动作,所以在等待接收完整码字的时间将会消耗掉。随着通讯技术的进步,速度与效能需求逐渐提升,解码的延迟与效能将会显得更加重要。 由于类费氏数列的QC-LDPC码的效能接近随机码且低复杂度。本篇论文在类费氏数列的编码架构上做调整。藉由零化调整类费式序列的QC-LDPC奇偶检查矩阵可避免复杂的再编码所造成干扰,让预先更正错误方法的正确率提升。利用类费氏数列的特性,对接收到码字的资料部分再编码,利用在接收完整码字的时间,在进行递回解码前预先判断错误位元的位置并对接收的讯息做调整,使解码的递回次数降低并提高低递回次数的解码效能,改善解码延迟时间与位元错误率。在SNR 5下能降低SPA的平均递回次数约27.6%,并使第一次递回降低约56.7%的位元错误率。 Low-density parity-check (LDPC) codes have performances very close to Shannon limit and have attracted a lot of attention since recent years. Although LDPC codes have good decoding performances, it costs a huge amount of time on decoding operations. Performance measures of LDPC codes include bit error rate (BER), decoding throughput, decoding power and decoding time, etc. To improve performance of LDPC codes, long code lengths are necessary. Since in LDPC decoding it needs to receive whole codewords then start the decoding operation. As such, it will introduce considerable delay time which is undesirable in low delay applications such as future 5G communications systems. According to Fibonacci-like QC-LDPC code performance approach to random code and low complexity. With some systematic difference between each element of Fibonacci-like sequences, a receiver can locate error bits without remembering the parity check matrix in the re-encoding procedure. In this thesis, we modified Fibonacci-like QC-LDPC code to re-encode codewords and detect error bits with characteristic of Fibonacci-like sequences. We zero some circular permutation matrices of Fibonacci-like QC-LDPC with dual diagonal construction to avoid interference caused by the complex re-encoding procedure and increase the success rate of our method of locating error. While receiving whole codewodes, this work locates error bits and modifies received information before commencing decoding procedures. As a result, the proposed decoding scheme can reduces both the iteration number at least 25% in the decoding procedures and bit error rate about 50% with fewer iteration numbers. |
URI: | http://etd.lib.nctu.edu.tw/cdrfb3/record/nctu/#GT070350279 http://hdl.handle.net/11536/142418 |
显示于类别: | Thesis |