基於類費氏數列架構之准循環低密度奇偶檢查碼再編碼預處理技術

Abstract

低密度奇偶檢查碼(LDPC)為一種效能非常接近夏儂極限(Shannon limit)的編解碼系統，在近年被廣泛討論。雖然LDPC碼有很好的解碼效能，但仍需要大量的時間在遞迴解碼過程中的運算。低密度奇偶檢查碼的效能，包括解碼的位元錯誤率、解碼的吞吐量、解碼耗能或解碼時間等。為提高LDPC碼效能，長碼長的碼字設計必不可少。由於解碼需要先接收到完整碼字才能開始做解碼動作，所以在等待接收完整碼字的時間將會消耗掉。隨著通訊技術的進步，速度與效能需求逐漸提升，解碼的延遲與效能將會顯得更加重要。 由於類費氏數列的QC-LDPC碼的效能接近隨機碼且低複雜度。本篇論文在類費氏數列的編碼架構上做調整。藉由零化調整類費式序列的QC-LDPC奇偶檢查矩陣可避免複雜的再編碼所造成干擾，讓預先更正錯誤方法的正確率提升。利用類費氏數列的特性，對接收到碼字的資料部分再編碼，利用在接收完整碼字的時間，在進行遞迴解碼前預先判斷錯誤位元的位置並對接收的訊息做調整，使解碼的遞迴次數降低並提高低遞迴次數的解碼效能，改善解碼延遲時間與位元錯誤率。在SNR 5下能降低SPA的平均遞迴次數約27.6%，並使第一次遞迴降低約56.7%的位元錯誤率。

Low-density parity-check (LDPC) codes have performances very close to Shannon limit and have attracted a lot of attention since recent years. Although LDPC codes have good decoding performances, it costs a huge amount of time on decoding operations. Performance measures of LDPC codes include bit error rate (BER), decoding throughput, decoding power and decoding time, etc. To improve performance of LDPC codes, long code lengths are necessary. Since in LDPC decoding it needs to receive whole codewords then start the decoding operation. As such, it will introduce considerable delay time which is undesirable in low delay applications such as future 5G communications systems. According to Fibonacci-like QC-LDPC code performance approach to random code and low complexity. With some systematic difference between each element of Fibonacci-like sequences, a receiver can locate error bits without remembering the parity check matrix in the re-encoding procedure. In this thesis, we modified Fibonacci-like QC-LDPC code to re-encode codewords and detect error bits with characteristic of Fibonacci-like sequences. We zero some circular permutation matrices of Fibonacci-like QC-LDPC with dual diagonal construction to avoid interference caused by the complex re-encoding procedure and increase the success rate of our method of locating error. While receiving whole codewodes, this work locates error bits and modifies received information before commencing decoding procedures. As a result, the proposed decoding scheme can reduces both the iteration number at least 25% in the decoding procedures and bit error rate about 50% with fewer iteration numbers.