應用於磁性尺細分割編碼器之高精度演算法電路設計與實現

Abstract

定位量測儀器大量應用於工業上，除雷射干涉儀之類高精度位移量測系統外，概分為磁性編碼器與光學編碼器兩類；編碼器利用感測器通過週期性柵極所產生的等距週期性弦波訊號做為量測依據，量測而得的相位變化即對應於移動距離。為了達到更高的精準度，電子細分割技術不斷的被開發出來，它藉由分割感測器量得的相位進而達到增進編碼器的量測精度與解析度的目的。 本論文基於這樣的趨勢，針對目前普遍使用且高精度的編碼器製作1024、2048倍兩種細分割倍率之後端數位電路設計，並提出了一種有良好降雜訊特性的建表模型，以及完整的訊號校正功能，有效提升量測精度。前端讀取電路先將感測器輸出電壓調整達到固定振福，並進入14-bit Delta Sigma ADC之Modulator進行超取樣分析，再利用14-bit Delta Sigma ADC之Decimator做降頻動作輸出數位訊號。接著經由數位訊號校正電路降低訊號中雜訊誤差，並藉由數學模型與演算法實現高精度的移動距離解析。將感測器所感測得到的訊號轉成數位訊號之後再依不同的理論達到細分割的目的。本論文所設計的電路已使用台積電0.18微米CMOS製程下線製作成功，其總面積為1491 μm x 1488 μm。電源電壓為3.3 V，時脈頻率為5.12 MHz，晶片測得的功率消耗約為0.292 mW，系統精度為0.7μm。

The main measurement and positioning apparatus, according to the sensor type of encoder, besides the laser interferometer that is more high precision displacement measurement system, can be classified into two types, the optical and magnetic encoder. The encoder always employs sensor passing through periodic and equal distance grating and then generates periodic quadrature scaling signals for displacement measurement. The phase is relative to the movement. To improve encoder accuracy or resolution, electronic interpolation technique had been developed to subdivide the phase of quadrature scaling signals. According to the trends, this thesis proposed a specific LUT with great noise immunity characteristic and a complete calibration process to improve the accuracy of system. And this chip was realized and involved 1024 and 2048 two different folds interpolation circuit. First, front-end circuits would adjust the sensor voltage. And the modulator of 14-bit Delta Sigma DAC dose the oversampling analysis. Next, do the decimation for dropping frequency by the decimator and output a digital signal. The digital signal would be adjusted by the calibration circuit. Last, system can obtain a high precision position and displacement with mathematical model and algorithm. This interpolation method satisfy the requirement of modern semiconductor and precision industry. The designed circuit has been successfully fabricated by using TSMC 0.18-μm CMOS process, where the active area is 1491 μm x 1488 μm. The power voltage is about 3.3 V. The clock is about 5.12 MHz. The measured power consumption of chip is about 0.292 mW. The accuracy of measurement system is 0.7 μm.