Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Chen, Te-Chih | en_US |
dc.contributor.author | Kuo, Yue | en_US |
dc.contributor.author | Chang, Ting-Chang | en_US |
dc.contributor.author | Chen, Min-Chen | en_US |
dc.contributor.author | Chen, Hua-Mao | en_US |
dc.date.accessioned | 2018-08-21T05:52:51Z | - |
dc.date.available | 2018-08-21T05:52:51Z | - |
dc.date.issued | 2017-12-01 | en_US |
dc.identifier.issn | 0021-4922 | en_US |
dc.identifier.uri | http://dx.doi.org/10.7567/JJAP.56.120303 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/144021 | - |
dc.description.abstract | Electrical characteristics of the dual-gate amorphous indium gallium zinc oxide thin-film transistors have been studied. Compared with the traditional bottom gate thin film transistor, the dual-gate structure has a larger on-current and a smaller threshold voltage shift because of the formation of an additional carrier channel and the depletion of the semiconductor layer. The top gate-to-channel barrier height is critical to threshold voltage and the stability of the thin film transistor. The complete overlap between the top gate and the channel region is important for the top channel function, which warrants the large on-current and low threshold slope shift. Therefore, the top gate design is critical to the performance and stability of the dual-gate thin film transistor. (C) 2017 The Japan Society of Applied Physics | en_US |
dc.language.iso | en_US | en_US |
dc.title | Stability of double gate amorphous In-Ga-Zn-O thin-film transistors with various top gate designs | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.7567/JJAP.56.120303 | en_US |
dc.identifier.journal | JAPANESE JOURNAL OF APPLIED PHYSICS | en_US |
dc.citation.volume | 56 | en_US |
dc.contributor.department | 光電工程學系 | zh_TW |
dc.contributor.department | Department of Photonics | en_US |
dc.identifier.wosnumber | WOS:000414292400002 | en_US |
Appears in Collections: | Articles |