標題: A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path
作者: Hsieh, E. Ray
Kuo, Yen Chen
Cheng, Chih-Hung
Kuo, Jing Ling
Jiang, Meng-Ru
Lin, Jian-Li
Chen, Hung-Wen
Chung, Steve S.
Liu, Chuan-Hsi
Chen, Tse Pu
Huang, Shih An
Chen, Tai-Ju
Cheng, Osbert
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Embedded memory;FinFET;high-k metal gate;RRAM;sneak path;Moore's gap
公開日期: 1-十二月-2017
摘要: In this paper, we have demonstrated an oxygen-vacancy-based bipolar RRAM on a pure logic 14-nm-node HKMG FinFET platform. A unit cell of the memory consists of a control transistor (FinFET) and a storage transistor (a second FinFET). The later performs as a bipolar RRAM. This unit cell can be integrated in an AND-type memory array. The memory cell has an ON/OFF ratio equal to 200 and 400 for the n-type and p-type FinFET RRAMs, respectively, endurance larger than 400 and 1000 times for n- and p-type devices, respectively, and the retention test for over 1 month under 125 degrees C temperature environment. To analyze the array performance of the AND-type FinFET RRAM at the circuit level, we have further discussed the issues of the sneak path and disturbance, in which an active-fin isolation of FinFET in an AND-type array has been suggested to minimize the leakage current induced by sneak paths. The results have shown a large window with up to 103 ON/OFF ratio, 30% standby power reduction, and 90% active power reduction with reference to the conventional AND-type array. As a result, the bipolar FinFET RRAM exhibits great potential for the embedded memory applications, in particular it can be extended to 28-nm HKMG and the FinFET platform beyond 14-nm technology node, to fill the Moore's gap between the high-performance logic and the embedded memory.
URI: http://dx.doi.org/10.1109/TED.2017.2763960
http://hdl.handle.net/11536/144215
ISSN: 0018-9383
DOI: 10.1109/TED.2017.2763960
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 64
起始頁: 4910
結束頁: 4918
顯示於類別:期刊論文