標題: A Digitally Dynamic Power Supply Technique for 16-Channel 12 V-Tolerant Stimulator Realized in a 0.18-mu m 1.8-V/3.3-V Low-Voltage CMOS Process
作者: Luo, Zhicong
Ker, Ming-Dou
Yang, Tzu-Yi
Cheng, Wan-Hsueh
電子工程學系及電子研究所
生醫電子轉譯研究中心
Department of Electronics Engineering and Institute of Electronics
Biomedical Electronics Translational Research Center
關鍵字: Dynamic power supply technique;high-voltage-tolerant;power efficiency;regulated charge pump;stimulator
公開日期: 1-十月-2017
摘要: A new digitally dynamic power supply technique for 16-channel 12-V-tolerant stimulator is proposed and realized in a 0.18-mu m 1.8-V/3.3-V CMOS process. The proposed stimulator uses four stacked transistors as the pull-down switch and pullup switch to withstand 4 times the nominal supply voltage (4 x VDD). With the dc input voltage of 3.3 V, the regulated threestage charge pump, which is capable of providing 11.3-V voltage at 3-mA loading current, achieves dc conversion efficiency of up to 69% with 400-pF integrated capacitance. Power consumption is reduced by implementing the regulated charge pump to provide a dynamic dc output voltage with a 0.5-V step. The proposed digitally dynamic power supply technique, which is implemented by using a p-type metal oxide semiconductor (PMOS) inverter with pulldown current source and digital controller, greatly improves the power efficiency of a system. The silicon area of the stimulator is approximately 3.5 mm(2) for a 16-channel implementation. The functionalities of the proposed stimulator have been successfully verified through animal test.
URI: http://dx.doi.org/10.1109/TBCAS.2017.2713122
http://hdl.handle.net/11536/144326
ISSN: 1932-4545
DOI: 10.1109/TBCAS.2017.2713122
期刊: IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS
Volume: 11
起始頁: 1087
結束頁: 1096
顯示於類別:期刊論文