完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Panda, Debashis | en_US |
dc.contributor.author | Sahu, Paritosh Piyush | en_US |
dc.contributor.author | Tseng, Tseung Yuen | en_US |
dc.date.accessioned | 2018-08-21T05:53:11Z | - |
dc.date.available | 2018-08-21T05:53:11Z | - |
dc.date.issued | 2018-01-10 | en_US |
dc.identifier.issn | 1556-276X | en_US |
dc.identifier.uri | http://dx.doi.org/10.1186/s11671-017-2419-8 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/144367 | - |
dc.description.abstract | In this work, we provide a comprehensive discussion on the various models proposed for the design and description of resistive random access memory (RRAM), being a nascent technology is heavily reliant on accurate models to develop efficient working designs and standardize its implementation across devices. This review provides detailed information regarding the various physical methodologies considered for developing models for RRAM devices. It covers all the important models reported till now and elucidates their features and limitations. Various additional effects and anomalies arising from memristive system have been addressed, and the solutions provided by the models to these problems have been shown as well. All the fundamental concepts of RRAM model development such as device operation, switching dynamics, and current-voltage relationships are covered in detail in this work. Popular models proposed by Chua, HP Labs, Yakopcic, TEAM, Stanford/ASU, Ielmini, Berco-Tseng, and many others have been compared and analyzed extensively on various parameters. The working and implementations of the window functions like Joglekar, Biolek, Prodromakis, etc. has been presented and compared as well. New well-defined modeling concepts have been discussed which increase the applicability and accuracy of the models. The use of these concepts brings forth several improvements in the existing models, which have been enumerated in this work. Following the template presented, highly accurate models would be developed which will vastly help future model developers and the modeling community. | en_US |
dc.language.iso | en_US | en_US |
dc.title | A Collective Study on Modeling and Simulation of Resistive Random Access Memory | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1186/s11671-017-2419-8 | en_US |
dc.identifier.journal | NANOSCALE RESEARCH LETTERS | en_US |
dc.citation.volume | 13 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000419953800001 | en_US |
顯示於類別: | 期刊論文 |