完整後設資料紀錄
DC 欄位語言
dc.contributor.authorPanda, Debashisen_US
dc.contributor.authorSahu, Paritosh Piyushen_US
dc.contributor.authorTseng, Tseung Yuenen_US
dc.date.accessioned2018-08-21T05:53:11Z-
dc.date.available2018-08-21T05:53:11Z-
dc.date.issued2018-01-10en_US
dc.identifier.issn1556-276Xen_US
dc.identifier.urihttp://dx.doi.org/10.1186/s11671-017-2419-8en_US
dc.identifier.urihttp://hdl.handle.net/11536/144367-
dc.description.abstractIn this work, we provide a comprehensive discussion on the various models proposed for the design and description of resistive random access memory (RRAM), being a nascent technology is heavily reliant on accurate models to develop efficient working designs and standardize its implementation across devices. This review provides detailed information regarding the various physical methodologies considered for developing models for RRAM devices. It covers all the important models reported till now and elucidates their features and limitations. Various additional effects and anomalies arising from memristive system have been addressed, and the solutions provided by the models to these problems have been shown as well. All the fundamental concepts of RRAM model development such as device operation, switching dynamics, and current-voltage relationships are covered in detail in this work. Popular models proposed by Chua, HP Labs, Yakopcic, TEAM, Stanford/ASU, Ielmini, Berco-Tseng, and many others have been compared and analyzed extensively on various parameters. The working and implementations of the window functions like Joglekar, Biolek, Prodromakis, etc. has been presented and compared as well. New well-defined modeling concepts have been discussed which increase the applicability and accuracy of the models. The use of these concepts brings forth several improvements in the existing models, which have been enumerated in this work. Following the template presented, highly accurate models would be developed which will vastly help future model developers and the modeling community.en_US
dc.language.isoen_USen_US
dc.titleA Collective Study on Modeling and Simulation of Resistive Random Access Memoryen_US
dc.typeArticleen_US
dc.identifier.doi10.1186/s11671-017-2419-8en_US
dc.identifier.journalNANOSCALE RESEARCH LETTERSen_US
dc.citation.volume13en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000419953800001en_US
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