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dc.contributor.authorGarrido, Marioen_US
dc.contributor.authorHuang, Shen-Juien_US
dc.contributor.authorChen, Sau-Geeen_US
dc.date.accessioned2018-08-21T05:53:14Z-
dc.date.available2018-08-21T05:53:14Z-
dc.date.issued2018-02-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2017.2722690en_US
dc.identifier.urihttp://hdl.handle.net/11536/144439-
dc.description.abstractIn this paper, we present new feedforward FFT hardware architectures based on rotator allocation. The rotator allocation approach consists in distributing the rotations of the FFT in such a way that the number of edges in the FFT that need rotators and the complexity of the rotators are reduced. Radix-2 and radix-2(k) feedforward architectures based on rotator allocation are presented in this paper. Experimental results show that the proposed architectures reduce the hardware cost significantly with respect to previous FFT architectures.en_US
dc.language.isoen_USen_US
dc.subjectFast Fourier transform (FFT)en_US
dc.subjectmulti-path delay commutator (MDC)en_US
dc.subjectpipelined architectureen_US
dc.subjectradix-2en_US
dc.subjectradix-2(k)en_US
dc.titleFeedforward FFT Hardware Architectures Based on Rotator Allocationen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2017.2722690en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume65en_US
dc.citation.spage581en_US
dc.citation.epage592en_US
dc.contributor.department電機工程學系zh_TW
dc.contributor.departmentDepartment of Electrical and Computer Engineeringen_US
dc.identifier.wosnumberWOS:000423559000014en_US
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