標題: Optimizing Incremental Step Pulse Programming for RRAM Through Device-Circuit Co-Design
作者: Liu, Jen-Chieh
Wu, Tzu-Yun
Hou, Tuo-Hung
電機學院
College of Electrical and Computer Engineering
關鍵字: RRAM;ISPP;device-circuit co-design;over stress
公開日期: 1-May-2018
摘要: A device-circuit co-design strategy of incremental step pulse programming (ISPP) tailored specifically for resistive-switching random access memory (RRAM) is elaborated using HfO2 RRAM as an example. The proposed strategy optimizes ISPP by considering programming energy, speed, peripheral circuit design, and device lifetime simultaneously. Interplay between ISPP configuration and device switching behavior is comprehensively clarified, and the result provides useful indicators for estimating peripheral circuit overhead and programming performance. Overstress effects affect both switching voltages and endurance lifetime substantially and, thus, should be carefully minimized.
URI: http://dx.doi.org/10.1109/TCSII.2018.2821268
http://hdl.handle.net/11536/144937
ISSN: 1549-7747
DOI: 10.1109/TCSII.2018.2821268
期刊: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS
Volume: 65
起始頁: 617
結束頁: 621
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