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dc.contributor.authorYang, Keng-Haoen_US
dc.contributor.authorTsai, Hsiang-Jenen_US
dc.contributor.authorLi, Chia-Yinen_US
dc.contributor.authorJendra, Paulen_US
dc.contributor.authorChang, Meng-Fanen_US
dc.contributor.authorChen, Tien-Fuen_US
dc.date.accessioned2018-08-21T05:53:55Z-
dc.date.available2018-08-21T05:53:55Z-
dc.date.issued2017-04-01en_US
dc.identifier.issn1549-8328en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TCSI.2016.2620520en_US
dc.identifier.urihttp://hdl.handle.net/11536/145347-
dc.description.abstractAs 2.5D/3D die stacking technology emerges, stacked dynamic random access memory (DRAM) has been proposed as a cache due to its large capacity in order to bridge the latency gap between off-chip memory and SRAM caches. The main problems in utilizing a DRAM cache are the high tag storage overhead and the high lookup latency. To address these, we propose tags-in-eDRAM (embedded DRAM) due to its higher density and lower latency. This paper presents an eTag DRAM cache architecture that is composed of a novel tag-comparison-inmemory scheme to achieve direct data access. It eliminates access latency and comparison power by pushing tag-comparison into the sense amplifier. Furthermore, we propose a Merged Tag to enhance the eTag DRAM cache by comparing last-level cache tags and DRAM cache tags in parallel. Simulation results show that the eTag DRAM cache improves energy efficiency by 15.4% and 33.9% in 4-core and 8-core workloads, respectively. Additionally, the Merged Tag achieves 32.1% and 48.7% energy efficiency improvements in 4-core and 8-core workloads, respectively.en_US
dc.language.isoen_USen_US
dc.subjectCache memoryen_US
dc.subjectDRAM chipsen_US
dc.subjectmemory architectureen_US
dc.subjectmemory managementen_US
dc.subjectsystem-on-chipen_US
dc.titleeTag: Tag-Comparison in Memory to Achieve Direct Data Access based on eDRAM to Improve Energy Efficiency of DRAM Cacheen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TCSI.2016.2620520en_US
dc.identifier.journalIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERSen_US
dc.citation.volume64en_US
dc.citation.spage858en_US
dc.citation.epage868en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000399015100010en_US
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