Title: An 100MHz to 1.6GHz DLL-Based Clock Generator Using a Feedback-Switching Detector
Authors: Lin, Ding-Guo
Lu, Bing-Hsun
Chiueh, Herming
電機工程學系
Department of Electrical and Computer Engineering
Issue Date: 2010
Abstract: In this paper, a glitch-free DLL-based clock generator using a feedback-switching detector is proposed for a programmable power management system. The proposed circuitry utilizes feedback switching detectors to eliminate undesired glitch problem which is generated by switching feedback stage of a DLL. The clock generator can generate clock signals ranging from 100MHz to 1.6GHz. The peak to peak jitter is 23.168ps and power consumption is 37.8mW at 1.6GHz. The proposed clock generator is implemented in TSMC 0.18 mu m process and occupies only 0.039 mm(2) which is suitable for the power management systems.
URI: http://hdl.handle.net/11536/14607
ISBN: 978-1-4244-6470-8
Journal: PROCEEDINGS OF THE 2010 18TH IEEE/IFIP INTERNATIONAL CONFERENCE ON VLSI AND SYSTEM-ON-CHIP
Begin Page: 101
End Page: 104
Appears in Collections:Conferences Paper