完整後設資料紀錄
DC 欄位語言
dc.contributor.authorChang, Hua-Yuen_US
dc.contributor.authorJiang, Iris Hui-Ruen_US
dc.contributor.authorChang, Yao-Wenen_US
dc.date.accessioned2018-08-21T05:56:32Z-
dc.date.available2018-08-21T05:56:32Z-
dc.date.issued2011-01-01en_US
dc.identifier.issn0738-100Xen_US
dc.identifier.urihttp://hdl.handle.net/11536/146310-
dc.description.abstractMetal-only ECO is prevalent at design houses to perform incremental design changes to resolve last found functional and/or timing failures. However, it is hard to perform mixed functional and timing changes manually. Prior endeavors focus on functional or timing ECO alone, but we observe that separating them may fail to fix all timing violations. Consequently, this paper presents the first work to perform simultaneous functional and timing ECO. We use an augmented bipartite graph to model both types of ECO. In addition, through comprehensive constant insertion and bridging, the functional capability of each spare cell is enhanced, thus facilitating spare cell selection. Experimental results show that our simultaneous functional and timing ECO engine can successfully resolve mixed functional and timing ECO that is unsolvable by the sequential scheme. Moreover, our engine outperforms the state-of-the-art works for timing ECO with a 117X speedup, and for functional ECO with 6-15% wirelength reductions.en_US
dc.language.isoen_USen_US
dc.subjectEngineering change orderen_US
dc.subjecttechnology remappingen_US
dc.subjectspare cellsen_US
dc.titleSimultaneous Functional and Timing ECOen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC)en_US
dc.citation.spage140en_US
dc.citation.epage145en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000297360000025en_US
顯示於類別:會議論文