完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Pan, Chi-Wen | en_US |
dc.contributor.author | Lee, Yu-Min | en_US |
dc.contributor.author | Huang, Pei-Yu | en_US |
dc.contributor.author | Yang, Chi-Ping | en_US |
dc.contributor.author | Lin, Chang-Tzu | en_US |
dc.contributor.author | Lee, Chia-Hsin | en_US |
dc.contributor.author | Chou, Yung-Fa | en_US |
dc.contributor.author | Kwai, Ding-Ming | en_US |
dc.date.accessioned | 2018-08-21T05:56:36Z | - |
dc.date.available | 2018-08-21T05:56:36Z | - |
dc.date.issued | 2013-01-01 | en_US |
dc.identifier.issn | 2153-6961 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/146405 | - |
dc.description.abstract | This work presents an iterative look-up table based thermal simulator, I-LUTSim, to efficiently estimate the temperature profile of three-dimensional integrated circuits. I-LUTSim includes two stages. First, the pre-process stage constructs thermal impulse response tables. Then, the simulation stage iteratively calculates the temperature profile via the table lookup. With this two-stage scheme, the maximum absolute error of I-LUTSim is less than 0.41% compared with that of a commercial tool ANSYS. Moreover, I-LUTSim is at least an order of magnitude faster than a fast matrix solver SuperLU [1] for the full-chip temperature simulation. | en_US |
dc.language.iso | en_US | en_US |
dc.title | I-LUTSim: An Iterative Look-Up Table Based Thermal Simulator for 3-D ICs | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2013 18TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE (ASP-DAC) | en_US |
dc.citation.spage | 151 | en_US |
dc.citation.epage | 156 | en_US |
dc.contributor.department | 電信工程研究所 | zh_TW |
dc.contributor.department | Institute of Communications Engineering | en_US |
dc.identifier.wosnumber | WOS:000394457400040 | en_US |
顯示於類別: | 會議論文 |