完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lu, Cheng-Hsien | en_US |
dc.contributor.author | Kho, Yi-Tung | en_US |
dc.contributor.author | Cheng, Chuan-An | en_US |
dc.contributor.author | Huang, Yen-Jun | en_US |
dc.contributor.author | Chen, Kuan-Neng | en_US |
dc.date.accessioned | 2018-08-21T05:56:46Z | - |
dc.date.available | 2018-08-21T05:56:46Z | - |
dc.date.issued | 2017-01-01 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/146626 | - |
dc.description.abstract | Hybrid bonding is one of the key technologies in 3D IC integration, which can integrate various functional chips using vertical interconnection to reduce RC delay and realize heterogeneous integration by bonding process. Conventional hybrid bonding uses oxide layer as the filling material between the metal interconnect, which can prevent oxidation of metal layer and enhance the bonding strength. However, there are some issues of oxide layer such as its poor stress absorption and the demand of surface flatness. Polymer is the potential material to replace oxide as hybrid bonding material because of its stress release property and better surface roughness tolerance. This paper investigates the adhesion properties of polymer and passivation layer and demonstrates perfect polymer-to-polymer wafer-level bonding results. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | 3D IC | en_US |
dc.subject | hybrid bonding | en_US |
dc.subject | polymer adhesion | en_US |
dc.title | Polymer for Wafer-level Hybrid Bonding and Its Adhesion to Passivation Layer in 3D Integration | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.journal | 2017 INTERNATIONAL CONFERENCE ON ELECTRONICS PACKAGING (ICEP) | en_US |
dc.citation.spage | 519 | en_US |
dc.citation.epage | 521 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000403391900126 | en_US |
顯示於類別: | 會議論文 |