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dc.contributor.authorChin, Ting-Wuen_US
dc.contributor.authorTsao, Shiao-Lien_US
dc.contributor.authorHung, Kuo-Weien_US
dc.contributor.authorHuang, Pei-Shuen_US
dc.date.accessioned2018-08-21T05:56:48Z-
dc.date.available2018-08-21T05:56:48Z-
dc.date.issued2017-01-01en_US
dc.identifier.issn1530-1591en_US
dc.identifier.urihttp://hdl.handle.net/11536/146676-
dc.description.abstractPrevious studies have used on-chip thermal sensors (diodes) to estimate the leakage power of a CPU. However, an embedded CPU equips only a few thermal sensors and may suffer from considerable spatial temperature variances across the CPU core, and leakage power estimation based on insufficient temperature information introduces errors. According to our experiments, the conventional leakage power models may have up to 22.9% estimation error for a 70-nm embedded CPU. In this study, we first evaluated the accuracy of leakage power estimates based on thermal sensors on different locations of a CPU and suggested locations that can reduce the error to 0.9%. Then, we proposed temperature-referred and counter-tracked estimation (TRACE) that relies on temperature sensors and hardware activity counters to estimate leakage power. The simulation results demonstrated that employing TRACE could reduce the error to 3.4%. Experiments were also conducted on a real platform to verify our findings.en_US
dc.language.isoen_USen_US
dc.subjectleakage poweren_US
dc.subjectmodelingen_US
dc.subjectthermal sensoren_US
dc.titleImproving the Accuracy of the Leakage Power Estimation of Embedded CPUsen_US
dc.typeProceedings Paperen_US
dc.identifier.journalPROCEEDINGS OF THE 2017 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE)en_US
dc.citation.spage1233en_US
dc.citation.epage1236en_US
dc.contributor.department資訊工程學系zh_TW
dc.contributor.departmentDepartment of Computer Scienceen_US
dc.identifier.wosnumberWOS:000404171500229en_US
Appears in Collections:Conferences Paper