Investigation and Comparison of Design Space for Ultra-Thin-Body GeOI/SOI Negative Capacitance FETs

標題:	Investigation and Comparison of Design Space for Ultra-Thin-Body GeOI/SOI Negative Capacitance FETs
作者:	Lee, Ho-Pei Yu, Chien-Lin You, Wei-Xiang Su, Pin 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	1-一月-2017
URI:	http://hdl.handle.net/11536/146759
ISSN:	1930-8868
期刊:	2017 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA)
顯示於類別：	會議論文