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dc.contributor.authorHsieh, E. R.en_US
dc.contributor.authorFan, Y. C.en_US
dc.contributor.authorLiu, C. H.en_US
dc.contributor.authorChung, Steve S.en_US
dc.contributor.authorHuang, R. M.en_US
dc.contributor.authorTsai, C. T.en_US
dc.contributor.authorYew, T. R.en_US
dc.date.accessioned2018-08-21T05:56:52Z-
dc.date.available2018-08-21T05:56:52Z-
dc.date.issued2017-01-01en_US
dc.identifier.urihttp://hdl.handle.net/11536/146764-
dc.description.abstractA new theory has been developed for geometric variation of trigate FinFETs. This geometric variation includes both line roughness induced variation and oxide-thickness variation, which can be measured from gate capacitance and Ig current variations, respectively. Experimental results show that trigate devices are subject to serious line variations as the fin height scales up and the fin-width scales down, leading to large Ion current variation, i.e., as we increase the fin aspect-ratio, line variation becomes worse which shows an increase of the active power consumption. On the other hand, oxide-thickness variation reveals significant impacts on the off-state leakage, i.e., a rough gate oxide yields to larger static power. These valuable results provide us important guideline for the design and manufacturing of high quality 3D gate FinFETs.en_US
dc.language.isoen_USen_US
dc.titleGeometric Variation: A Novel Approach to Examine the Surface Roughness and the Line Roughness Effects in Trigate FinFETsen_US
dc.typeProceedings Paperen_US
dc.identifier.journal2017 IEEE ELECTRON DEVICES TECHNOLOGY AND MANUFACTURING CONFERENCE (EDTM)en_US
dc.citation.spage130en_US
dc.citation.epage131en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000409022100053en_US
Appears in Collections:Conferences Paper