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dc.contributor.authorChen, Yin-Nienen_US
dc.contributor.authorFan, Ming-Longen_US
dc.contributor.authorHu, Vita Pi-Hoen_US
dc.contributor.authorSu, Pinen_US
dc.contributor.authorChuang, Ching-Teen_US
dc.date.accessioned2018-08-21T05:56:55Z-
dc.date.available2018-08-21T05:56:55Z-
dc.date.issued2014-01-01en_US
dc.identifier.issn1533-4678en_US
dc.identifier.urihttp://dx.doi.org/10.1145/2627369.2627649en_US
dc.identifier.urihttp://hdl.handle.net/11536/146823-
dc.description.abstractIn this work, we propose a mixed TFET-MOSFET 8T SRAM cell comprising MOSFET cross-coupled inverters, dedicated TFET read stack and TFET write access transistors. Exploiting both the merits of TFET and MOSFET devices, the proposed SRAM cell provides significant improvement in SRAM stability, V-min and performance. The proposed cell is evaluated and compared with the conventional MOSFET 8T cell and pure TFET 8T cell using mixed mode TCAD simulations. The results indicate that the proposed mixed TFET-MOSFET cell topology is viable for ultra-low voltage operation.en_US
dc.language.isoen_USen_US
dc.subjectTunnel FETen_US
dc.subjectTFET SRAMsen_US
dc.subjectultra-low voltageen_US
dc.subjectultra-low poweren_US
dc.titleUltra-Low Voltage Mixed TFET-MOSFET 8T SRAM Cellen_US
dc.typeProceedings Paperen_US
dc.identifier.doi10.1145/2627369.2627649en_US
dc.identifier.journalPROCEEDINGS OF THE 2014 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED)en_US
dc.citation.spage255en_US
dc.citation.epage258en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000412656100047en_US
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