完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Yin-Nien | en_US |
dc.contributor.author | Fan, Ming-Long | en_US |
dc.contributor.author | Hu, Vita Pi-Ho | en_US |
dc.contributor.author | Su, Pin | en_US |
dc.contributor.author | Chuang, Ching-Te | en_US |
dc.date.accessioned | 2018-08-21T05:56:55Z | - |
dc.date.available | 2018-08-21T05:56:55Z | - |
dc.date.issued | 2014-01-01 | en_US |
dc.identifier.issn | 1533-4678 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1145/2627369.2627649 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/146823 | - |
dc.description.abstract | In this work, we propose a mixed TFET-MOSFET 8T SRAM cell comprising MOSFET cross-coupled inverters, dedicated TFET read stack and TFET write access transistors. Exploiting both the merits of TFET and MOSFET devices, the proposed SRAM cell provides significant improvement in SRAM stability, V-min and performance. The proposed cell is evaluated and compared with the conventional MOSFET 8T cell and pure TFET 8T cell using mixed mode TCAD simulations. The results indicate that the proposed mixed TFET-MOSFET cell topology is viable for ultra-low voltage operation. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Tunnel FET | en_US |
dc.subject | TFET SRAMs | en_US |
dc.subject | ultra-low voltage | en_US |
dc.subject | ultra-low power | en_US |
dc.title | Ultra-Low Voltage Mixed TFET-MOSFET 8T SRAM Cell | en_US |
dc.type | Proceedings Paper | en_US |
dc.identifier.doi | 10.1145/2627369.2627649 | en_US |
dc.identifier.journal | PROCEEDINGS OF THE 2014 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED) | en_US |
dc.citation.spage | 255 | en_US |
dc.citation.epage | 258 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000412656100047 | en_US |
顯示於類別: | 會議論文 |