標題: Design and Implementation of a Packet-in Buffer System for SDN Switches
作者: Wang, Shie-Yuan
Chang, Chun-Hao
Hsieh, Yi-Hsuan
Chou, Chih-Liang
資訊工程學系
Department of Computer Science
公開日期: 1-Jan-2017
摘要: In this paper, we designed, implemented, and evaluated the performance of a Packet-in packet buffer system in an SDN bare metal commodity switch and Open vSwitch. In our approach, only the first packet of a new flow needs to be sent to the SDN controller via a Packet-in packet and all subsequent packets can be temporarily stored in the Packet-in packet buffer system until the arrival of the flow rule. Our experimental results show that our approach effectively prevents packets of a new flow from being dropped when they pass an SDN switch, significantly reduces the switch CPU usage, greatly reduces the control plane bandwidth usage, and greatly reduces the Packet-in packet processing load imposed on the SDN controller.
URI: http://hdl.handle.net/11536/147032
ISSN: 1530-1346
期刊: 2017 IEEE SYMPOSIUM ON COMPUTERS AND COMMUNICATIONS (ISCC)
起始頁: 955
結束頁: 960
Appears in Collections:Conferences Paper