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dc.contributor.authorLin, Yue-Minen_US
dc.contributor.authorLin, Kun-Pingen_US
dc.contributor.authorLee, Ting-Chien_US
dc.contributor.authorLi, Meng-Yingen_US
dc.contributor.authorLee, Chien-Pingen_US
dc.date.accessioned2019-04-02T06:00:08Z-
dc.date.available2019-04-02T06:00:08Z-
dc.date.issued2014-07-03en_US
dc.identifier.issn0013-5194en_US
dc.identifier.urihttp://dx.doi.org/10.1049/el.2014.0629en_US
dc.identifier.urihttp://hdl.handle.net/11536/147776-
dc.description.abstractAn InAs-channel heterostructure field-effect transistor on GaAs substrates is presented. The conduction channel was formed by the InAs/AlAs0.16Sb0.84/AlSb quantum well. With the addition of the AlAs0.16Sb0.84 layer, holes that are generated by impact ionisation at high voltages are effectively confined in the InAs channel because of the large Delta Ev in this type-I heterostructure. By suppressing the hole injection into and accumulation in the buffer layer, the feedback through the back gate is eliminated and excellent output characteristics were obtained. The fabricated devices had a threshold voltage of about -0.6 V with a channel mobility of 18 100 cm(2)/V-s and a sheet carrier density of 1.2 x 10(12) cm(-2).en_US
dc.language.isoen_USen_US
dc.titleInAs-based heterostructure field-effect transistor using AlAs0.16Sb0.84 double barriersen_US
dc.typeArticleen_US
dc.identifier.doi10.1049/el.2014.0629en_US
dc.identifier.journalELECTRONICS LETTERSen_US
dc.citation.volume50en_US
dc.citation.spage1018en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000340241200029en_US
dc.citation.woscount0en_US
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