標題: | A Model-Based-Random-Forest Framework for Predicting V-t Mean and Variance Based on Parallel I-d Measurement |
作者: | Lin, Chien-Hsueh Tsai, Chih-Ying Lee, Kao-Chi Yu, Sung-Chu Liau, Wen-Rong Hou, Alex Chun-Liang Chen, Ying-Yen Kuo, Chun-Yi Lee, Jih-Nung Chao, Mango C. T. 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics |
關鍵字: | Machine learning;model-based random forest (MBRF);threshold voltage;wafer acceptance test (WAT) |
公開日期: | 1-Oct-2018 |
摘要: | To measure the variation of device V-t requires long test for conventional wafer acceptance test (WAT) test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V-t for a large number of designs under test (DUTs). The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V-t based only on the combined I-d measured from parallel connected DUTs. The proposed framework can further minimize the total number of I-d measurement required for prediction models while limiting their accuracy loss. The experimental results based on the SPICE simulation of a UMC 28-nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R -squared for predicting either V-t mean or V-t variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve a 120.3x speedup on overall test time for test structures with 800 DUTs. |
URI: | http://dx.doi.org/10.1109/TCAD.2017.2783304 http://hdl.handle.net/11536/148193 |
ISSN: | 0278-0070 |
DOI: | 10.1109/TCAD.2017.2783304 |
期刊: | IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS |
Volume: | 37 |
起始頁: | 2139 |
結束頁: | 2151 |
Appears in Collections: | Articles |